SMIC was officially listed in science and technology innovation board: high R&D investment, chip manufacturing "burning" equipment.
Wenxue business data school
On July 16th, SMIC was officially listed in science and technology innovation board. Although the outstanding shares in A shares only account for about 14% of the total issued shares, and the P/E ratio is as high as 113.12 times (calculated at the issue price of 27.46 yuan/share), it still received enthusiastic pursuit and the opening price soared. On the other hand, TSMC, the world’s largest wafer foundry with SMIC as the benchmark, will also release its financial report for the second quarter of 2020 today.
Chips are generally divided into three links — — Chip design, chip manufacturing and chip packaging testing, among which, the wafer foundry link in chip manufacturing where SMIC and TSMC are located is one of the weakest links in Chinese mainland’s chip industry chain at present.
"First-class design, second-class packaging and testing, and third-class chip manufacturing", Sheng Linghai, vice president of global consulting firm Gartner Semiconductor Research Group and analyst, commented on the current situation of Chinese mainland’s chip industry and global benchmarking to Business Data School. "At present, Huawei Hisilicon’s chip design is already the world’s first-class level, and the technical threshold for packaging and testing is relatively low, but the chip manufacturing link — — The technology including upstream mask aligner equipment and wafer foundry is still far from the world’s first-class. "
According to incomplete statistics, there are as many as 20 chip companies listed or to be listed in science and technology innovation board from April to July, but only one chip manufacturer is SMIC.
Just recently, at the moment when the "half-time war" in chip manufacturing was tense, the Chinese Academy of Sciences announced that it had broken through the 5-nanometer lithography technology, and SMIC had also developed a production process below 7 nanometers, which could be mass-produced by the end of the year, which brought a glimmer of light to the localization of chips, but how much did these relieve the urgent demand for high-end chips in one to three years?
Business Data School made a detailed comparison between SMIC and TSMC in the past five years. From the perspective of revenue scale (see the figure below for details), TSMC’s revenue has always been more than 10 times that of SMIC, while its wafer shipment is only about 2-3 times, which means that SMIC’s price per wafer is cheaper than TSMC’s, which shows that SMIC’s bargaining power is far lower than TSMC’s.
(Cartography: Business Data School)
(Cartography: Business Data School)
According to the rough calculation of Business Data School, in 2019, the shipment price of TSMC per wafer was about $3,609.1, while that of SMIC was only $619.6, with a price difference of six times.
(Cartography: Business Data School)
It is precisely because of the low price that SMIC’s gross profit margin has remained between 20% and 30%, far below TSMC’s gross profit margin of over 45%.
The reason why the price gap is so large is that SMIC’s mass-produced products are still relatively backward. In 2019, the two areas with the largest production capacity are still between 0.15/0.18 micron and 55/65 nm, while the current world-class high-end chips are mainly 14 nm, especially at 28 nm. Now there has been a global overcapacity situation.
At present, the revenue of SMIC’s 14 nm and 28 nm process products is relatively low, and the 28 nm process products are facing the risks of overcapacity, continuous decline in revenue, high depreciation pressure and negative gross profit margin.
In the past three years, the revenue of SMIC’s 28 nm process products was divided into 1.63 billion yuan, 1.24 billion yuan and 810 million yuan, accounting for 8.12%, 6.19% and 4.03% respectively, and the revenue and proportion continued to decline; In the fourth quarter of 2019, mass production of 14 nm process products began, and the related income was 57.0615 million yuan, accounting for 0.29%.
To sum up, SMIC has transferred some general equipment originally used in the 28 nm process to other processes with higher profits.
(Cartography: Business Data School)
This also directly determines the level of net profit. The net interest rates of SMIC in recent three years are 5.1%, 2.3% and 4.1%, which are far lower than the net interest rates of TSMC of 32.3%, 34.0% and 35.1%.
After deducting non-recurring gains and losses in 2018 and 2019, SMIC’s net profit attributable to shareholders of the parent company was negative, which were-6.168 billion yuan and-5.22 billion yuan respectively.
Behind the difference in chip prices between SMIC and TSMC is the gap in advanced technology. To further enhance commercial competitiveness, we must catch up technically.
The rich terminal application scenarios of integrated circuits determine that the mainstream technology nodes and processes of chip products in various sub-sectors are different, and the technology iteration and corresponding market demand change rapidly.
Advanced technology generally advances one generation after one to three years, such as TSMC’s mass production of 16 nm /14 nm in 2015, 10 nm in 2016, 7 nm in 2018 and 5 nm in 2020. If the technology iteration of wafer foundry lags behind the technological requirements of product application, it will not meet the needs of the market and customers.
According to IC Insights statistics, TSMC accounted for 59% of the global pure wafer foundry market share in 2018, and SMIC accounted for 6%. The mass production time of SMIC’s 14 nm process is 2019, and the next generation process has entered the stage of customer introduction.
Although the research and development of advanced technology needs constant capital investment and accumulation, the emergence of key technical figures can often push this process forward a long way.
A key figure behind SMIC’s breakthrough in 14 nm and 7 nm technology is Liang Mengsong, the co-CEO of SMIC. In just 298 days, the difficulty of 14 nm process technology was overcome, and the yield of the process was improved to 95%.
As a former research and development backbone of TSMC, Liang Mengsong is one of the top ten chip talents in the world. After leaving TSMC for half a year in 2009, Liang Mengsong joined Samsung, which directly upgraded Samsung’s technical level by one generation, from 28 nm to 14 nm.
The next SMIC to conquer is the mass production of 7 nanometers.
In addition, according to Liang Mengsong, the development route of SMIC’s 7nm process technology is not much different from TSMC’s. On the 7 nm process node, three types have been developed, among which the manufacturing process of N7 and N7P can not use EUV lithography technology, while the process of N7+ will use EUV technology, but even if EUV technology is used, the number of mask layers is very small.
On the 5nm process node, EUV lithography technology has been fully utilized, and the number of mask layers can reach as many as 14, which is a high technical level in the industry. — — This is also the part that TSMC is currently trying to mass-produce.
In addition, in terms of production capacity, TSMC currently operates a 150mm fab, six 200mm fabs, five 300mm fabs and four advanced back-end fabs. In 2019, the annual production capacity (in terms of 12-inch equivalent wafers) was about 12.3 million wafers, while in 2018 it was about 12 million wafers. This growth was mainly due to the expansion of 7-nanometer technology.
The layout of SMIC’s fabs is as follows: there are a 300mm fab, a 200mm fab and a controlled 300mm advanced process fab in Shanghai; There is a 300mm wafer factory and a holding 300mm advanced process wafer factory in Beijing. There are two 200mm fabs in Tianjin and Shenzhen. There is a holding 300mm bump processing joint venture factory in Jiangyin.
Since it is a strong technology-driven business, it is inevitable to invest in research and development. The figure below shows the magnitude and proportion of global chip companies’ investment in R&D in 2019.
Taking SMIC as an example, R&D expenses mainly include depreciation expenses, research and testing expenses, employee compensation expenses, etc. From 2017 to 2019, R&D expenses were 3.57 billion yuan, 4.47 billion yuan and 4.74 billion yuan respectively, showing an increasing trend.
However, the fastest growth is actually "depreciation expense", which is due to the purchase of some advanced machinery and equipment with higher unit price, which makes depreciation expense increase year by year, accounting for 30.34% of R&D expenses in 2019.
Secondly, the cost of research and testing is mainly the sample fee, which was 1.31 billion yuan in 2019, accounting for 27.70% of the research and development expenses, and the research and development efficiency has improved.
Thirdly, it is the salary cost of R&D personnel. In 2019, the salary of R&D personnel of SMIC exceeded 900 million yuan.
Sheng Linghai revealed that due to the current hot chip industry, chip engineers are very expensive at present. A chip design engineer with 10 years of experience has an annual salary of more than 1 million.
Let’s go back to the landing of SMIC in science and technology innovation board. The main purpose of raising funds is also for the construction of new production lines and R&D reserves. Among them, the investment of the 12-inch chip SN1 project is 8 billion yuan, which is used to meet part of the capital demand for building a 12-inch production line project with a monthly production capacity of 35,000 pieces, and the production technology level has been upgraded to 14 nanometers and below; Advanced and mature technology research and development project reserve fund project raised funds of 4 billion yuan for technology research and development to enhance the company’s market competitiveness.
Although the localization of chips is the general trend, the trend of globalization has not changed — — The chip was designed in the United States, processed in Taiwan, China, packaged in Malaysia, and finally sent to China for production and global sales.
"The birth of semiconductors is a result of the common development of all countries. So far, no country can have a complete semiconductor industry chain by itself." Su Wei, general manager of China Resources Microelectronics OEM Group, said, "At present, the self-sufficiency rate of domestic chips is less than 30%, and the development of China’s entire semiconductor industry chain is obviously short-board, but in the field of power semiconductors, we see that it is the first to break through and the gap with the international first-class technology level is narrowing."
At present, the low-end chips can be basically localized, but if we want to go to the high end, the wafer foundry link where SMIC is located will be a key link for the 7-nanometer mass production in the next three years. If it can be successfully realized, Chinese mainland’s chip manufacturing will take another step towards the world-class goal.